(1) Field of the Invention
This invention relates to the formation of alignment marks which are preserved after contact holes formed in an inter-metal dielectric layer are filled with contact metal and the wafer is planarized. More particularly the invention relates to back etching the inter-metal dielectric using methods which do not etch the contact metal.
(2) Description of the Related Art
U.S. Pat. No. 5,858,854, filed Oct. 16, 1996, by Tsai et al. and assigned to the same assignee, describes the use of optically non reflecting material to form high contrast alignment marks.
U.S. Pat. No. 5,401,691 to Caldwell describes a method of forming and preserving alignment marks through integrated circuit processing steps. Back etching of the inter-metal dielectric layer to enhance the alignment marks is not described.
U.S. Pat. No. 5,369,050 to Kawai describes a method of fabrication of semiconductor devices which includes the formation of alignment marks. The alignment marks are formed by forming an alignment mark in an insulating layer and etching a groove in the insulating layer around the alignment mark using the alignment mark as a mask. Mask patterns are aligned with the device using the alignment mark surrounded by the groove for alignment.
U.S. Pat. No. 5,270,255 to Wong, U.S. Pat. No. 5,294,556 to Kawamura, and U.S. Pat. No. 5,482,893 to Okabe et al. describe methods device formation and metallurgy deposition which preserve an alignment mark through several process steps.
This invention describes a method of forming an alignment mark after chemical mechanical polishing has been used to planarize a wafer after deposition of contact metal. Alignment holes are formed in an inter-metal dielectric layer covering an alignment region of the wafer and filled with contact metal prior to wafer planarization. The inter-metal dielectric is then etched back using dry vertical anisotropic etching until a thin layer of the dielectric has been removed from the alignment region. The contact metal filing the alignment hole then extends above the surface of the dielectric in the alignment region of the wafer forming an alignment mark. This alignment mark is preserved through subsequent processing steps such as blanket deposition of electrode metal and patterning of the electrode metal. Unlike the groove described by Kawai, a relatively large region of dielectric is removed around the alignment mark improving the accuracy of automatic detection of the alignment mark during subsequent process steps. This invention describes a method to recover an alignment mark after planarization of a wafer using chemical mechanical polishing has removed the geometrical features distinguishing the alignment mark.